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https://github.com/espressif/ESP8266_RTOS_SDK.git
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Merge branch 'bugfix/fix_nmi_reenter_when_multi_enable_mac_interrupt' into 'master'
fix(xtensa): Fix NMI reenter when multi enable MAC interrupt See merge request sdk/ESP8266_RTOS_SDK!1468
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@ -131,6 +131,7 @@
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//}}
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//}}
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//Interrupt remap control registers define{{
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//Interrupt remap control registers define{{
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#define NMI_INT_ENABLE_REG (PERIPHS_DPORT_BASEADDR)
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#define EDGE_INT_ENABLE_REG (PERIPHS_DPORT_BASEADDR + 0x04)
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#define EDGE_INT_ENABLE_REG (PERIPHS_DPORT_BASEADDR + 0x04)
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#define WDT_EDGE_INT_ENABLE() SET_PERI_REG_MASK(EDGE_INT_ENABLE_REG, BIT0)
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#define WDT_EDGE_INT_ENABLE() SET_PERI_REG_MASK(EDGE_INT_ENABLE_REG, BIT0)
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#define TM1_EDGE_INT_ENABLE() SET_PERI_REG_MASK(EDGE_INT_ENABLE_REG, BIT1)
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#define TM1_EDGE_INT_ENABLE() SET_PERI_REG_MASK(EDGE_INT_ENABLE_REG, BIT1)
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@ -285,24 +285,36 @@ void esp_dport_close_nmi(void)
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void IRAM_ATTR vPortETSIntrLock(void)
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void IRAM_ATTR vPortETSIntrLock(void)
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{
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{
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if (NMIIrqIsOn == 0) {
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if (NMIIrqIsOn == 0) {
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uint32_t regval = REG_READ(NMI_INT_ENABLE_REG);
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REG_WRITE(NMI_INT_ENABLE_REG, 0);
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vPortEnterCritical();
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vPortEnterCritical();
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if (!ESP_NMI_IS_CLOSED()) {
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if (!ESP_NMI_IS_CLOSED()) {
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do {
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do {
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REG_WRITE(INT_ENA_WDEV, WDEV_TSF0_REACH_INT);
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REG_WRITE(INT_ENA_WDEV, WDEV_TSF0_REACH_INT);
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} while(REG_READ(INT_ENA_WDEV) != WDEV_TSF0_REACH_INT);
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} while(REG_READ(INT_ENA_WDEV) != WDEV_TSF0_REACH_INT);
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}
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}
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REG_WRITE(NMI_INT_ENABLE_REG, regval);
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}
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}
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}
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}
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void IRAM_ATTR vPortETSIntrUnlock(void)
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void IRAM_ATTR vPortETSIntrUnlock(void)
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{
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{
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if (NMIIrqIsOn == 0) {
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if (NMIIrqIsOn == 0) {
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uint32_t regval = REG_READ(NMI_INT_ENABLE_REG);
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REG_WRITE(NMI_INT_ENABLE_REG, 0);
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if (!ESP_NMI_IS_CLOSED()) {
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if (!ESP_NMI_IS_CLOSED()) {
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extern uint32_t WDEV_INTEREST_EVENT;
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extern uint32_t WDEV_INTEREST_EVENT;
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REG_WRITE(INT_ENA_WDEV, WDEV_INTEREST_EVENT);
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REG_WRITE(INT_ENA_WDEV, WDEV_INTEREST_EVENT);
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}
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}
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vPortExitCritical();
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vPortExitCritical();
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REG_WRITE(NMI_INT_ENABLE_REG, regval);
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}
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}
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}
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}
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